EODData

FRA, CDS: Cadence Design Systems Inc

22 Dec 2025
LAST:

269.4

CHANGE:
 0.65
OPEN:
269.2
HIGH:
270.0
ASK:
0.0
VOLUME:
381
CHG(%):
0.24
PREV:
270.0
LOW:
268.5
BID:
0.0
 

CHART

RECENT END OF DAY PRICES

DateOpenHighLowCloseVolume
22 Dec 25269.2270.0268.5269.4381
19 Dec 25269.1270.1269.1270.0742
18 Dec 25266.6273.4266.6268.8195
17 Dec 25272.5272.5265.3266.4264
16 Dec 25268.1273.6268.1271.91.5K
15 Dec 25275.2277.4270.6271.0604
12 Dec 25284.8284.8274.6274.6136
11 Dec 25288.1288.1274.4285.2212
10 Dec 25287.1289.3286.0289.351
09 Dec 25288.9289.4287.8288.0949

PROFILE

Name:Cadence Design Systems Inc
About:Cadence Design Systems, Inc. provides software, hardware, and other services worldwide. The company offers functional verification services, such as Jasper, a formal verification platform; Xcelium, a parallel logic simulation platform; Palladium, an enterprise emulation platform; and Protium, a prototyping platform for chip verification. It also provides digital IC design and sign off products, including Genus synthesis and Joules RTL power solutions, as well as Modus DFT software solution to reduce systems-on-chip design-for-test time; physical implementation tools, such as place and route, optimization, and performing sign-off checks for manufacturing; and Innovus implementation system, a digital IC design and signoff solution. In addition, the company offers custom IC design and simulation, such as Virtuoso Studio, a solution platform for custom, analog, mixed-signal, photonics, and RF semiconductors; and system design and analysis products, a Multiphysics platform that helps in design and simulate electronics and entire systems in electromagnetic, thermal, structure, computational fluid dynamics, molecular, PCB and packaging, mechanical, and structural analysis. Further, it provides semiconductor IP product for design architectures; Functional Verification; digital ic design and signoff; EDA product that addresses the design and verification for semiconductor chips and manufacturing process technologies; and verification IP with memory models to emulate and model the expected behavior and interaction of standard industry system interface protocols. Additionally, it offers services related to methodology, education, and hosted design solutions, as well as technical support and maintenance services. It serves consumer, hyperscale computing, 5G communications, mobile, automotive, aerospace and defense, industrial, and life science industries. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.
Sector:Technology
Address:Building 5, San Jose, CA, United States, 95134
Website:https://www.cadence.com
ISIN:US1273871087
LEI:GCT7RXJOGLXPV0NXZY22

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FUNDAMENTALS

Trailing P/E:84.73 
Forward P/E:82.29 
PEG Ratio:-2.77 
Price to Sales:15.03 
Price to Book:14.95 
Profit Margin:0.20 
Operating Margin:0.35 
Return on Assets:0.11 
Return on Equity:0.22 
Revenue:4.524B 
EBITDA:1.628B 
Shares:272.49M 
Market Cap:73.395B 

TECHNICAL INDICATORS

MA5:269.260.0%
MA10:275.442.3%
MA20:275.482.3%
MA50:278.393.4%
MA100:289.947.6%
MA200:273.651.6%
STO9:13.07 
STO14:11.76 
RSI14:45.13
WPR14:-87.18 
MTM14:-19.50
ROC14:-0.07 
ATR:5.93 
Week High:277.403.0%
Week Low:265.251.5%
Month High:291.858.4%
Month Low:258.451.6%
Year High:327.0321.4%
Year Low:193.6739.1%
Volatility:13.14